AMD Dishes on Zen 3 and Zen 4 Architecture, Milan and Genoa Roadmap

(Image credit: AMD)

At the HPC-AI Advisory Council UK conference, AMD revealed new details about its Zen 3 and Zen 4 architectures, along with a roadmap that gives us the timeline and some key specs for its next-gen EPYC Milan and Genoa lines of EPYC data center chips. The presentation was uploaded to YouTube and then taken down in rather quick fashion, likely because the company wasn’t ready to divulge these key details yet. We snagged a copy of the video before it was taken down and have some new details of AMD’s future plans.

AMD’s revolutionary Zen microarchitecture introduced the world to mass-produced chiplet-based processors that enable the company to use the same underlying design across both consumer and enterprise chips. Any changes to the company’s architecture will filter out to all of its new client and enterprise chips, meaning these changes will likely come to the vaunted Ryzen lineup of chips in the future.

(Image credit: AMD)

But when? AMD presented a roadmap outlining the arrival of the Milan chips, which feature Zen 3 cores, entering production in Q3 2020. That means the company is executing its plan of providing yearly updates to its architecture. The company also noted that it has already taped out the chips and is sampling them to customers.

The new Milan chips will feature the 7nm+ node, a refreshed version of the current node with higher performance. They also feature the same maximum of 64 cores as the current-gen Rome models and drop into the same SP3 socket, meaning they are backward compatible with existing platforms. They’ll also come with the same support for eight channels of DDR4 and PCIe 4.0 and respect the base 120-225W TDP envelope, though it’s logical to expect higher-TDP variants like the 7H12 are also in the works. The chips also have two threads per core, silencing the rather dubious rumors that AMD would switch to four threads per core (SMT4) as we see with some competing chips.

(Image credit: AMD)

The next-gen Milan chips still feature the same nine-die arrangement as the current-gen Rome models, with eight compute die and one I/O die, along with eight cores assigned to each compute chiplet. The largely unchanged specifications, at least in key areas, implies Milan is merely a “Tock”-equivalent, or just a move to the second-gen of the 7nm node (7nm+).

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